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Intel Merom Mobile processor, the successor to Yonah and part of the Santa Rosa platform, is expected to be released in September on a 65nm process. Merom is a Dual Core CPU combining the architecture of NetBurst and the Pentium-M to achieve both high performance and lower power consumption. Merom utilises the FSB and EM64T of NetBurst, but is largely based around the Pentium M architecture. The CPU is a 4-issue design (compared to the 3 issue cores of the Athlon 64 and Pentium 4 architectures) with a 14 stage pipeline - significantly shorter than that of NetBurst CPUs (from 20 in Willamette to 31 stages in Prescott). The shorter pipeline will ensure that Merom and it's derivatives will not clock as high as Precott, but it will likely clock as fast or faster than the Athlon 64 - i.e. around 3Ghz. However, the IPC of Merom is likely to be better than the Athlon 64 due to it's 4 issue superscalar design and vastly better than the P4.
Merom will feature 4MB of L2 cache shared between the two cores and will feature a direct L1 to L1 cache transfer system between the L1 caches of each of the cores to improve performance. Merom will also feature a number of enhances prefectching schemes to enhance the use of the caches. Merom will feature SSE4 support, virtualization capabilities, LaGrande technology and 64-bit capability in addition to EDB, EIST and iAMT2. The initial members of the Meron family are expected to be:

T7600 (4MB L2, 2.33GHz)
T7400 (4MB L2, 2.16GHz)
T7200 (4MB L2, 2.0GHz)
T5600 (2MB L2, 1.83GHz)
T5500 (2MB L2, 1.66GHz)

The performance of Merom is expected to be around 20% higher than Yonah with the same power usage.
Από: http://www.mikeshardware.co.uk/RoadmapQ306.htm